v cc (max) 25v v offset(max) 100vdc high/low side output freq (f osc ) 500khz output current (i o ) +/-1.2a high/low side pulse edge matching +/- 25ns high speed, 100v, self oscillating 50% duty cycle, full-bridge driver features ? simple primary side control solution to enable full -bridge dc-bus converters for 48v distributed systems with reduced component count and board space. ? frequency and dead time set by two external compone nts ? maximum 500khz per channel output with 50% duty cyc le ? adjustable dead time 50nsec ~ 200nsec ? floating channel designed for bootstrap opera tion up to +100vdc ? high and low side pulse width matching to +/- 25ns ec ? overcurrent protection with adjustable hiccup perio d. ? undervoltage lockout and internal soft start ? part also available leadfree ir2086s(pbf) data sheet pd no.60226 revb package description the ir2086s(pbf) is a self oscillating full-bridge controller and driver ic with 50% duty cycle ideally suited for 36v-75v full -bridge dc bus converters. dead time can be controlled through proper selection of c t and can range from 50 to 200nsec. internal soft start increases p ulse width on power up and maintains equal pulse widths for the high and l ow outputs throughout the start up cycle. undervoltage lockout prevents o peration if vcc is less than 7.5 vdc. over current shutdown occurs when the vol tage on the cs pin exceeds 200mv. restart after overcurrent trip can b e delayed by adjusting the external capacitor. the delay time ranges from 10 s to 1s. tpical connection (refer to lead assign- ments for correct pin configuration). this/ these diagram(s) show electrical connec- tions only. please refer to our application notes and designtips for proper circuit board layout. 16-lead soic product summar rsense ir2086s cd** lo1 ho1 vb1 com2* vs1 vb2 ho2 vs2 vcc lo2 *com2 must be shorted to com1 for proper operation **cd is optional vbuss (100 vdc max) delay cs com1 ct rt ct vcc (9 ~15v) downloaded from: http:///
2 ir2086s(pbf) www.irf.com absolute maximum ratings v bias (v cc , v bs ) = 12v, c l = 1000 pf, and t a = 25 c unless otherwise specified. absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. all vo ltage parameters are absolute voltages referenced to com. all curren ts are defined positive into any lead. the thermal resistance and power dissipation ratings are measured under board mounte d and still air conditions. note1: c are should be taken to avoid output switching condi tions where the vs node flies inductively below gro und by more than 5v. smbol definition mi n. max. units v cc low side supply voltage -0.3 25 v b1,2 high side floating supply voltage -0.3 150 v s1,2 high side floating supply offset voltage v b1,2 - 25 v b1,2 + 0.3 v ho1,2 high side floating output voltage v b1,2 - 0.3 v b1,2 + 0.3 v lo1,2 low side output voltage -0.3 v cc + 0.3 v ct ct pin voltage -0.3 v cc + 0.3 v cs cs pin voltage -0.3 v cc + 0.3 v delay delay pin voltage -0.3 v cc + 0.3 dv s /dt allowable offset voltage slew rate -50 +50 v/ns i cc supply current 40 ma p d package power dissipation (16-lead soic) 1.0 w rth ja thermal resistance, junction to ambient (16-lead soi c) 200 c/w t j junction temperature -55 150 t s storage temperature -55 150 t l lead temperature (soldering, 10 seconds) 300 vdc c recommended operating conditions for proper operation the device should be used with in the recommended conditions. v b1,2 high side floating supply voltage 9.5 15 v s1,2 steady state high side floating supply offset volta ge -5 100 v cc supply voltage 9.5 15 i cc supply current 1 ma r t timing resistor 10 100 kohms c t timing capacitor 47 1000 pf fmax operating frequency (per channel) 500 khz t j junction temperature -40 125 c vdc smbol definition min. max. units downloaded from: http:///
3 ir2086s(pbf) www.irf.com dnamic electrical characteristics v bias (v cc , v bs ) = 12v, c l = 1000 pf, and t a = 25 c unless otherwise specified. smbol definition min. tp. max. units test conditions t r turn-on rise time 40 60 t f turn-off fall time 20 30 fout per channel output frequency 440 500 580 khz tdt high/low output dead time 50 pm high/low pulse width matching 25 v s = 0v ~ 100v t dcs overcurrent shut down delay 200 t restart overcurrent restart delay 0.5 sec vcc =15v, cd=100nf nsec v s = 0v ct=100pf, rt=10kohm nsec static electrical characteristics v bias (v cc , v bs ) = 12v, c l = 1000 pf and t a = 25 c unless otherwise specified. smbol definition min. tp. max. units test conditions v oh1,2 high level output voltage, (v bias - v o ) 1.5 v ol1,2 low level output voltage 0.1 i leak offset supply leakage current 50 i qbs quiescent v bs supply current 150 i qcc quiescent v cc supply current 1.75 ma v cs+ overcurrent shutdown threshold 200 270 350 mv u vcc+ undervoltage positive going threshold 6.5 7.25 8.0 u vcc- undervoltage negative going threshold 6.0 6.8 7.7 i o+ output high short circuit current 1.2 i o- output low short circuit current 1.2 v a v a downloaded from: http:///
4 ir2086s(pbf) www.irf.com functional block diagrams cs uvlo pulse steering osc hv level shifter1 dv/dt booster1 rs uvbs1 vb1 ho1 vs1 vcc ct com 200mv comp dead time ir2086 self oscillating full brigde driver with soft start, over current shut down, and delayed restart r qn s q delay comp soft start over current sense with delayed restart lo1 delay match 1 vcc lo2 delay match 2 vcc hv level shifter2 dv/dt booster2 rs uvbs2 vb2 ho2 vs2 s downloaded from: http:///
5 ir2086s(pbf) www.irf.com smbol description v cc supply com1,2 supply return v b1,2 high side floating supply v s1,2 floating supply return ho1,2 high side output lo1,2 low side output ct oscillator input cs current sense input delay over current restart delay lead definitions lead assignments 16 12 13 14 15 11 10 9 1 5 4 3 2 6 7 8 vb1 ho1 vs1 com2 lo2 vs 2 ho2 vb2 vcc com1 csct ir2086s delay lo1 n/c n/c detailed pin description cs: the input pin to the overcurrent comparator. exce eding the overcurrent threshold value specified in static electrical parameters section will termina te output pulses. a new soft start cycle will comme nce after the expiration of the programmed delay time at dela y pin. delay: delay programming pin for restart after overcurren t condition. a capacitor connected to this pin will determine the delay form the over current trip to t he beginning of a new soft start cycle. the delay t ime ranges from 10us to 1s, and is set according to: ct: the oscillator-programming pin. only two componen ts are required to program the internal oscillator frequency: a resistor connected between the vcc pin and the ct pin, and a capacitor connected from the ct pin to gnd. the approximate oscillator frequency i s determined by the following simple formula: where frequency is in hertz (hz), r t resistance in ohms ( ) and c t capacitance in farads (f). the recom- mended range of timing resistors is between 10k and 100k and range of time capacitances is between 47pf and 470pf. the timing resistors less than 10k should be avoided. the value of the timing capacitor determines the am ount of dead time between the two output drivers: l ower the ct, shorter the dead time and vice versa. it i s not recommended to use a timing capacitor below 4 7pf. for best performance, keep the time components as c lose as possible to the ir2086s. separated ground and vdd traces to the timing components are encouraged. us ua v c t cc d d 10 2 + f osc = 1 / (2 r t c t ) downloaded from: http:///
6 ir2086s(pbf) www.irf.com detailed pin description continued com1, com2 : signal ground and power ground for all functions. due to high current and high frequency operation, a low impedance circuit board ground pla ne is highly recommended. ho1, ho2, lo1, lo2 : high side and low side gate drive pins. the high and low side drivers can directly drive the gate of a power mosfet. the drivers are capable of 1a peak source and sink currents. it is recomme nded that the high and low drive pins be very close to t he gates of the high side and low side mosfets to p revent any delay and distortion of the drive signals. vb1, vb2: high side power input connection. the high side su pplies are derived from bootstrap circuits using low-leakage schottky diodes and ceramic capacitors. to prevent noise, the schottky diodes and bypass capacitors should be very close to the ir2086s. vs1, vs2 : the high side power return connection. vs should be connected directly to the source terminal of high side mosfet with a trace as short as possible. vcc : the ic bias input connection for the device. alth ough the quiescent vcc current is very low, total s upply current will be higher, depending on the gate charg e of the mosfets connected to the ho and lo pins, a nd the programmed oscillator frequency, total vcc curr ent is the sum of quiescent vcc current and the ave rage current at ho and lo. knowing the operating freque ncy and the mosfet gate charge (qg) at selected vcc voltage, the average current to drive four power mo sfets in full-bridge configuration can be calculate d from: iave = 4 x qg x fosc (note that fosc is equal to the frequency per chann el.) to prevent noise problem, a bypass ceramic capacito r connected to vcc and com1 / com2 should be placed as close as possible to the ir2086s. ir2086s has an under voltage lookout feature for th e ic bias supply, vcc. the minimum voltage require d on vcc to make sure that ic will work within specifica tions must be higher than 8.5v (9.5v minimum vcc is recommended to prevent asymmetrical gates signals o n ho and lo pins that are expected when vcc is between 7.5v and 8.5v). downloaded from: http:///
7 ir2086s(pbf) www.irf.com fig. 1 output frequency (-25 o c to 125 o c) fig. 2 dead time (@27 o c) 1.00 10.00 100.00 1000.00 0 20 40 60 80 100 120 rt (kohms) f(khz) 100pf200pf 500pf 1nf 0 50 100 150 200 250 300 0 2 04 06 08 01 0 01 2 0 rt(kohms) dt (nsec) 100pf 200pf 500pf 1nf 0 50 100 150 200 250 300 350 -50 0 50 100 150 tem p (c) dt (nsec) 1nf 500pf 200pf100pf fig. 3 dead time vs temp fig. 4 over current restart delay time vs temp (vcc = 15v) 1.0e+00 1.0e+01 1.0e+02 1.0e+03 1.0e+04 1.0e+05 1.0e+06 1.0e+07 -50 0 50 100 150 temp (c) over current restart delay time (use c 100nf 1nf 10pf 10nf downloaded from: http:///
8 ir2086s(pbf) www.irf.com case outlines 16-lead soic (narrow bod) 01-6018 01-3064 00 (ms-012ac) downloaded from: http:///
9 ir2086s(pbf) www.irf.com world headquarters : 233 kansas street, el segundo, california 90245 t el: (310) 252-7105 this product has been designed and qualified for the in dustrial market http://.irf.com/ data and specifications subject to change ithout notice. 12/19/2006 leadfree part marking information lead free released non-lead freereleased part number date code irxxxxxx yww? ?xxxx pin 1identifier ir logo lot code (prod mode - 4 digit spn code) assembly site code p ? marking code pkg desig ss part leadfree number part number ir2086s ir2086spbf IR2086STR IR2086STRpbf parts per tube 45 ------ parts per reel ------ 2500 ordering information pin count 1616 downloaded from: http:///
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